Simulated annealing for VLSI design

by D.F. Wong, H.W. Leong, C.L. Liu

[目次]

  • 1. Introduction.- 1.1. Combinatorial Optimization.- 1.2. The Method of Simulated Annealing.- 1.3. Remarks.- 2. Placement.- 2.1. Introduction.- 2.2. Gate-Array Placement.- 2.2.1. The K-G-V Algorithm.- 2.2.2. TimberWolf.- 2.3. Standard-Cell Placement.- 2.3.1. TimberWolf.- 2.3.2. Another Approach.- 2.4. Macro/Custom-Cell Placement.- 2.4.1. Jespen and Gelatt's Algorithm.- 2.4.2. TimberWolf.- 2.5. Other Stochastic Algorithms.- 2.5.1. Genetic Placement.- 2.5.2. Simulated Evolution Placement.- 2.6. Concluding Remarks.- 3. Floorplan Design.- 3.1. Introduction.- 3.2. Part 1: Rectangular Modules.- 3.2.1. Slicing Floorplans.- 3.2.2. Solution Space.- 3.2.3. Neighboring Solutions.- 3.2.4. Cost Function.- 3.2.5. Annealing Schedule.- 3.2.6. Experimental Results.- 3.3. Part 2: Rectangular and L-Shaped Modules.- 3.3.1. Geometric Figures.- 3.3.2. The Operators.- 3.3.3. Floorplan Representation.- 3.3.4. The Algorithm.- 3.3.5. Experimental Results.- 3.4. Concluding Remarks.- 4. Channel Routing.- 4.1. Introduction.- 4.2. The Channel Routing Problem.- 4.3. The Channel Router SACR.- 4.3.1. Solution Space.- 4.3.2. Neighboring Solutions.- 4.3.3. Cost Function.- 4.3.4. Annealing Schedule.- 4.3.5. Fast Approximation Scheme.- 4.4. The Channel Router SACR2.- 4.5. Experimental Results and Discussion.- 4.6. Concluding Remarks.- 5. Permutation Channel Routing.- 5.1. Introduction.- 5.2. Motivation and Applications.- 5.3. NP-Completeness Results.- 5.4. First Method - Simulated Annealing.- 5.4.1. Neighboring Solutions.- 5.4.2. Cost Function.- 5.4.3. Annealing Schedule.- 5.5. Second Method - Iterative Improvement.- 5.5.1. The Iterative Improvement Scheme.- 5.5.2. Version-D.- 5.5.3. Version-C.- 5.5.4. Choice of Initial Solution.- 5.6. Experimental Results.- 5.7. Concluding Remarks.- 6. PLA Folding.- 6.1. Introduction.- 6.2. The PLA Folding Problem.- 6.3. The PLA Folding Algorithm.- 6.3.1. Solution Space.- 6.3.2. Neighboring Solutions.- 6.3.3. Cost Function.- 6.3.4. Annealing Schedule.- 6.4. Multiple-Folded PLA Realization.- 6.5. Constrained Multiple Folding.- 6.6. Simple Folding.- 6.7. Experimental Results and Discussions.- 6.8. Concluding Remarks.- 7. Gate Matrix Layout.- 7.1. Introduction.- 7.2. Problem Formulation.- 7.3. Generalized Problem Formulation.- 7.4. Advantages of the Generalized Formulation.- 7.5. The Simulated Annealing Method.- 7.5.1. Solution Space.- 7.5.2. Neighboring Solutions.- 7.5.3. Cost Function.- 7.5.4. Annealing Schedule.- 7.6. Experimental Results.- 7.7. Concluding Remarks.- 8. Array Optimization.- 8.1. Introduction.- 8.2. The Array Optimization Problem.- 8.3. Definitions.- 8.4. The Array Optimization Algorithm.- 8.4.1. The Algorithm Column-Fold.- 8.4.2. The Algorithm Row-Fold.- 8.4.3. The Solution Space.- 8.4.4. The Main Folding Algorithm.- 8.5. Experimental Results.- 8.6. Concluding Remarks.- References.

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この本の情報

書名 Simulated annealing for VLSI design
著作者等 Leong, Hon Wai
Liu, C. L.
Wong, D. F.
Liu Chung Laung
Leong H. W.
シリーズ名 The Kluwer international series in engineering and computer science
出版元 Kluwer Academic
刊行年月 c1988
ページ数 vii, 202 p.
大きさ 24 cm
ISBN 0898382564
NCID BA0373392X
※クリックでCiNii Booksを表示
言語 英語
出版国 アメリカ合衆国
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